NXP Semiconductors /MIMXRT1011 /CCM /CCGR3

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Interpret as CCGR3

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CG00CG10CG20CG30CG40CG50CG60CG70CG80CG90CG10 0CG11 0CG12 0CG13 0CG14 0CG15

Description

CCM Clock Gating Register 3

Fields

CG0

Reserved

CG1

Reserved

CG2

Reserved

CG3

Reserved

CG4

aoi1 clock (aoi1_clk_enable)

CG5

Reserved

CG6

Reserved

CG7

ewm clocks (ewm_clk_enable)

CG8

wdog1 clock (wdog1_clk_enable)

CG9

flexram clock (flexram_clk_enable)

CG10

Reserved

CG11

Reserved

CG12

Reserved

CG13

Reserved

CG14

The OCRAM clock cannot be turned off when the CM cache is running on this device.

CG15

iomuxc_snvs_gpr clock (iomuxc_snvs_gpr_clk_enable)

Links

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